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INVITED TALKS

5th Workshop on
Highly Parallel Processing on a Chip (HPPC 2011)

August 30, 2011, Bordeaux, France

in conjunction with

the 17th International European Conference on Parallel and Distributed Computing (Euro-Par)
August 29 - September 2, 2011, Bordeaux, France.



KEYNOTE

Extreme Thread-Level-Parallelism on Sparc Processors

Rick Hetherington, Vice President, Microelectronics, Oracle Corp, USA

Abstract: Sparc has been the leader in pursuing high levels of throughput on commercial workloads with the use of Chip-Multithreaded Processors. Introduced in 2005, the Niagara 1 processor broke new ground by providing 32 processor threads across 8 cores. This talk will revisit the history of Sparc CMT as well as presenting the current state of CMT with the fourth generation of Sparc CMT and some projections as to where this technology is heading in future.  The talk will touch on experience gained, lessons learned, what worked and what did not work during this nearly decade of experience on highly threaded processor design.

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Bio: Rick Hetherington is Vice President in the Microelectronics Division of Oracle. He is responsible for Sparc Architecture and Performance. In this role, he manages a team of architects and performance analysts to develop processors and systems.

Rick Hetherington was the chief technology officer for Sun’s Microelectronics business unit where he set the technical direction for Sun's SPARC processor development and related technologies. Hetherington is driving Sun's leadership in the chip multithreading (CMT) approach to processor design, in which multiple cores and multiple threads combine to generate extraordinary throughput and power efficiency.

Prior to his appointment as CTO, Hetherington provided oversight for the architecture, performance and roadmap of UltraSPARC T1(TM) processors and systems as chief architect for Sun's Horizontal Systems group. From 2000 to 2002, Hetherington took a hiatus from Sun to join a networking start-up as VP of engineering.

Hetherington originally joined Sun in 1996 as co-architect of Sun's Project Millennium processor. Prior to Sun, he spent 16 years with Digital Equipment Corp., working on a variety of VAX and Alpha processors and systems. His last position at Digital was system architect of EV6 (21264) processor.

Hetherington earned his bachelor's degree from Pennsylvania State University and currently holds 63 patents.

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Submission:
June 10, 2011

Notification:
July 25, 2011

Workshop:
August 30, 2011

Final LNCS paper:
September, 2011

Registration:
via Euro-Par

Contact:
chair@hppc-
workshop.org
Sponsors:
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