CALL FOR CHAPTERS
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Book Title: "Programming Multi-core and Many-core Computing Systems"


This book is planned to be published in June 2012 in the Wiley Series on "Parallel and Distributed Computing" by John Wiley & Sons, Inc.


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Context

While multi-core processors alleviate several problems that are related to single-core processors -- known as memory wall, power wall, or instruction-level parallelism wall -- they raise the issue of the programmability wall. On the one hand, program development for multi-core processors, especially for heterogeneous multi-core processors, is significantly more complex than for single-core processors. On the other hand, programmers have been traditionally trained for the development of sequential programs, and only a small percentage of them have experience with parallel programming.

While in the past only a relatively small group of programmers interested in High Performance Computing (HPC) was concerned with the parallel programming issues, the situation has changed dramatically with the appearance of multi-core processors in commonly used computing systems. Traditionally parallel programs in HPC community have been developed by heroic programmers using a simple text editor as programming environment, programming at a low-level of abstraction, and doing manual performance optimization. It is expected that with the pervasiveness of multi-core processors parallel programming will become mainstream, but it can not be expected that a mainstream programmer will prefer to use the traditional HPC methods and tools. Therefore, a new book is needed that describes the state-of-the-art parallel programming methods and tools to aid the programmers in mastering the efficient programming of multi-core and many-core systems.


Target audience

All programmers of modern computing systems (considering the current pervasiveness of multi-core and many-core systems); Chief Information Officers (CIO); professors, young researchers (doctoral students and PostDocs), graduate students.


Topics

Chapters should address programming of multi-core or many-core computing systems. Topics of interest include,

1: Programming Models and Languages
(programming models and languages for homogeneous and heterogeneous multi-core and many-core systems)

2: Parallel Algorithms and Data-structures
(parallel algorithms and data-structures for homogeneous and heterogeneous multi-core and many-core systems)

3: Programming Environments
(software development environments/frameworks, compilers, run-time systems,..)

4: Performance Evaluation and Optimization
(methods and tools for program performance evaluation, optimization, auto-tuning, design-space exploration,..)

5: Hardware Support Mechanisms for Programmability
(hardware support mechanisms for auto-tuning, synchronization, scheduling,..)

6: Applications
(applications that illustrate the software development for homogeneous or heterogeneous multi-core or many-core systems)


Submission

Authors should submit via e-mail to Editors a short (1--2 pages) chapter proposal (as PDF or plain text) that contains: (1) title, (2) names and affiliation of authors, (3) abstract, (4) references of up to five most relevant publications of authors that are related to the chapter proposal, (5) chapter mission and topics intended to be covered by the chapter as well as (6) contact author information. Thereafter, authors of the accepted proposals will receive from the Editors detailed guidelines on how to prepare the full chapter. This book is planned to be published in 2011 in the Wiley Series on "Parallel and Distributed Computing" by John Wiley & Sons, Inc. More about the publisher is available here.


Important dates

Chapter proposal: October 8, 2010
Notification of proposal acceptance: November 24, 2010
Full draft chapter submission: February 13, 2011
Notification of conditional chapter acceptance: May 13, 2011
Final version of chapter: May 20, 2011 (Firm Deadline)


Editors

Sabri Pllana, pllana AT par.univie.ac.at, University of Vienna, Austria, (Corresponding Editor)
Fatos Xhafa, fatos AT lsi.upc.edu, UPC, BARCELONA TECH, Spain